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Thursday, May 27th, 2021

    Time Event
    8:30a
    Marvell Announces First PCIe 5.0 NVMe SSD Controllers: Up To 14 GB/s

    Today Marvell is announcing the first NVMe SSD controllers to support PCIe 5.0, and a new branding strategy for Marvell's storage controllers. The new SSD controllers are the first under the umbrella of Marvell's Bravera brand, which will also encompass HDD controllers and other storage accelerator products. The Bravera SC5 family of PCIe 5.0 SSD controllers will consist of two controller models: the 8-channel MV-SS1331 and the 16-channel MV-SS1333.

    Marvell Bravera SC5 SSD Controllers
      MV-SS1331 MV-SS1333
    Host Interface PCIe 5.0 x4 (dual-port x2+x2 capable)
    NAND Interface 8ch, 1600 MT/s 16ch, 1600 MT/s
    DRAM DDR4-3200, LPDDR4x-4266 with ECC
    Sequential Read 14 GB/s
    Sequential Write 9 GB/s
    Random Read 2 M IOPS
    Random Write 1 M IOPS
    Max Controller Power 8.7 W 9.8 W
    Virtualization 16 Physical Functions, 32 Virtual Functions

    These new SSD controllers roughly double the performance available from PCIe 4.0 SSDs, meaning sequential read throughput hits 14 GB/s and random read performance of around 2M IOPS. To reach this level of performance while staying within the power and thermal limits of common enterprise SSD form factors, Marvell has had to improve power efficiency by 40% over their previous generation SSD controllers. That goes beyond the improvement that can be gained simply from smaller fab process nodes, so Marvell has had to significantly alter the architecture of their controllers. The Bravera SC5 controllers still include a mix of Arm cores (Cortex-R8, Cortex-M7 and a Cortex-M3), but now includes much more fixed-function hardware to handle the basic tasks of the controller with high throughput and consistently low latency.

    Such an architectural shift often means sacrificing flexibility, but Marvell doesn't expect that to be a problem thanks in large part to the Open Compute Project's Cloud SSD specifications. Those standards go beyond the NVMe spec and define which optional features should be implemented, plus target performance and power levels for different form factors. The Cloud SSD specs were initially a collaboration between Microsoft and Facebook but have caught on in the broader market and even have the support of traditional enterprise server vendors like Dell and HP. This allows controller vendors like Marvell and SSD manufacturers to more narrowly focus their product development efforts, and to target a wider range of customers with a single hardware and firmware platform. In spite of the shift toward more fixed hardware functionality, the Bravera SC5 controllers still support a wide range of features including NVMe Zoned Namespaces (ZNS), Open Channel SSDs and Kioxia's Software-Enabled Flash model.

    In addition to being the first available PCIe 5.0 SSD controllers, the Bravera SC5 family includes the first 16-channel controller designed to fit on the EDSFF E1.S form factor, using a controller package size of 20x20 mm with peak controller power of 9.8 W. The new controllers are currently sampling to select customers, with the option of using Marvell's firmware or developing custom firmware.

    11:45a
    An Interview with Tenstorrent: CEO Ljubisa Bajic and CTO Jim Keller

    Many billions have been poured into the industry when it comes to AI processor development. If you were to list the number of AI processors currently in development or production at the wide variety of start-ups, then that number quickly surpasses 50 and is seemingly forever rising. Each one of these companies is aiming to build a compelling product to meet the needs of their intended customers, all the way from small-scale inference workloads up to multi-datacenter scale training. One of these companies is Tenstorrent, led by CEO Ljubisa Bajic, who recently hired famed chip designer Jim Keller as the CTO. Jim was also the initial angel investor when the company started. Today we are interviewing these two about the company, the Tenstorrent product, and the direction of the demands for machine learning accelerators.

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